Acceleration measurement through hardware implementation on FPGAS
Implementación en hardware para la medición de la aceleración usando FPGA
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This paper presents a hardware implementation for the acceleration measurement using the MEMS ADLX355 accelerometer in FPGA (Field Programmable Gate Array). The hardware design is implemented using the hardware description language VHDL. The acceleration data are sent from the ADLX355 sensor to the FPGA using the I2C communication protocol. A UART communication interface is used for the transmission of measurement data from the FPGA to the computer. The design is synthesized on the FPGA 10CL025YU256I7 and verified in hardware using the Intel® Cyclone 10LP development board. The synthesis results show that the acceleration measurement on the Intel® board using one and two ADLX355 sensors is 460 LUTs, 290 registers and 234 MHz, and 852 LUTs, 526 registers and 234 MHz, respectively. The results show that the FPGA-based implementation outperforms the microcontroller-based implementation in execution time.
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